ST21F384
Smar tcard MCU with 384 Kbytes of high density Flash memory
Data Brief
Features
ST21F384 major applications include:
Mobile communications (GSM, 3G and CDMA) Java applications
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Hardware features
Enhanced 8/16-bit CPU core with 16 Mbytes linear addressable memory 7 Kbytes User RAM 384 Kbytes User Flash memory with OTP area: 10-year data retention 100,000 Erase/Write cycles Page granularity of 128 Bytes Block granularity: 1 Kbyte 128 Bytes of OTP for User Page Erase time 3 ms Block Erase 1 Kbyte in 15 ms Byte programming in 18 s Flash Erase / Write Protection software programmable on 64 Kbyte Sectors Field / Loader mode management Asynchronous Receiver Transmitter supporting ISO 7816-3 T=0 and T=1 protocols Two 8-bit timers with interrupt capability 1.8V, 3V and 5V supply voltage ranges External clock frequency from 1 up to 7.5 MHz High performance provided by: CPU clock frequency up to 22 MHz External clock multiplier (2x, 3x, and 4x) Current consumption complies with GSM and ETSI specifications Power-saving Standby state Contact assignment compatible ISO 7816-2 ESD protection greater than 4 kV (HBM)
Micromodule
Wafer
Software features
Flash Loader Flash drivers
Security features
Monitoring of environmental parameters Protection against faults ISO 3309 CRC calculation block Cryptographic performances(1): Triple DES (with keys loaded): Single DES (with keys loaded): True Random Number Generator Unique serial number on each die Hardware DES accelerator 9.3 s 3.1 s
Development environment
Software development and firmware generation are supported by a comprehensive set of development tools dedicated to software design and validation:
C Compiler Simulator Emulator
1. Typical values at 22 MHz
October 2007
Rev 1
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www.st.com 1
For further information contact your local STMicroelectronics sales office.
Description
ST21F384
1
Description
The ST21F384 product is a serial access microcontroller specially designed for costeffective secure mobile applications. It is based on an enhanced STMicroelectronics 8/16-bit CPU core offering 16 MBytes linear addressing space. It is manufactured using an advanced highly reliable ST Flash technology. The device includes a DES accelerator. A serial interface fully compatible with the ISO 7816-3 standard (T = 0 and T = 1) for Smartcard applications is available. A CRC calculation block is also available and is directly accessible by the User. The product architecture is optimized for low power consumption applications. A flexible clock generator module provides increased performance for specific current requirements. ST drivers and ST Loader are located in the ST ROM area. Figure 1. ST21F384 Block diagram
RAM
Flash memor y
ST ROM
DES Accelerator
ST ROM Firewall
Internal Bus
CRC Module
Clock Generator Module CLK
2x 8-bit Timers
Security Administrator
True Random Number Generator Vcc
8/16-bit CPU Core
IART
RESET
GND
I/O
622
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Revision history
1.1
Development environment
Development tools for smartcard products include a complete range of hardware systems and software tools from STMicroelectronics and third-party tool suppliers. The range of tools includes solutions to help you to develop and debug your application and evaluate smartcard products and their peripherals. An Integrated Development Environment (IDE), the STMicroelectronics Visual Debug (STVD), provides a set of tools for developing embedded applications. This interface manages the project configuration, code edition, code generation and program debugging. A Smartcard ICS emulator (SCICS) and simulator are available for developing and validating your application code. All the information needed to generate the application code and personalization will be collected in a delivery file (.DLV extension). This file is created using the Delivery menu of the STMicroelectronics configuration software tool, SCOOL.
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Revision history
Table 1.
Date 22-Oct-2007
Document revision history
Revision 1 Initial release Changes
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