STWD100
Low-power watchdog with chip-enable pin to ease manufacturing process
The new STWD100 is a low-power watchdog circuit that improves system reliability by monitoring the system for software code execution errors. When the watchdog input detects a transitional edge, the internal watchdog timer clears and restarts, then begins counting again. If the watchdog timer exceeds the watchdog timeout period, the active low, open-drain watchdog output asserts for the watchdog pulse period to alert the system of the fault.
The STWD100 includes an active-low enable pin with a built-in pull-down resistor. This pin is handy for momentarily disarming the device. Two examples of when this important feature is required are: in-system programming and slow booting applications. When the enable pin is left unconnected (electrically floating), the part is enabled.
STWD100 block diagram
STWD100 application diagram
Other related families
Besides the standalone watchdog circuit, the STWD100, ST also offers two other families of products integrating the watchdog function.
STM63xx/STM68xx: Family of resets + watchdog. Similar to the STWD100 but the watchdog timer has a fixed value of 1.6 seconds and no chip enable.
M41Txx/M41STxx: In the large family of serial real-time clocks, the watchdog oscillator runs in conjunction with the 32 kHz oscillator. The major advantages are the very accurate timing across temperature and the programmability of the timer (from 62.5 milliseconds to 31 minutes).
Datasheet
Format: (222 kb)
Last Updated: 01/08/2008
Pages: 25
Key features
Available watchdog timeout periods: 3.4 ms, 6.3 ms, 102 ms and 1.6 ms Chip-enable output, allows watchdog disable Available in open-drain or push-pull WDO output Operating temperature: -40 to +125 °C Package: SOT23-5 and SC-70
Applications
Telecommunications Industrial Medical Alarms systems Networking UPS
Available watchdog timeout periods: 3.4 ms, 6.3 ms, 102 ms and 1.6 ms