SPEAr™ Head is a powerful SoC based on 110 nm HCMOS technology and consists of two main parts: an
ARM9 architecture and an
embedded customizable logic block. The ARM architecture relieves users from developing a complete RISC platform; it includes a high performance ARM926EJ-S processor, which makes SPEAr™ Head compliant with Linux and WindowsCE OSs, a fast AMBA 2.0 bus structure and a large IP portfolio that provides both high and low speed connectivity, static and dynamic memory controllers (supporting also DDR) and 16 KB of single port SRAM.
The embedded customizable logic block allows users to design custom projects. It consists of an embedded macro where it is possible to map up to 200K equivalent ASIC gates, with 2 dedicated DMA blocks to speed up the data flow with the main memories, 8 interrupt lines and 112 dedicated general purpose I/Os.
In order to allow an easy and quick implementation of the custom project, a rich
development kit is available, composed by a development board, software supports and detailed documentation.
SPEAr™ Head is a high performance digital engine optimized for embedded applications. Thanks to its features and the available development support, it can be use for a wide range of different purposes and allows a time to market of few weeks with an unprecedented cost saving.